C&T Solution CT-MSB01 Manual de usuario Pagina 36

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CT-MHW0X Intel 4th Gen Core Processor i7/i5/i3/Pentium/Celeron Micro-ATX IMB
36
Signal
I/O
Description
GPO[0:3]
O
General purpose output pins. Upon a hardware
reset, these outputs should be low.
GPI[0:3]
I
General purpose input pins. Pulled high
internally on the Module.
4.13.1 GPIO Configuration
4.13.1.1 Board Design
PIN#
GPIO#
Default Configuration
1
--
VCC3
2
--
GND
3
DIO_PH_OUT0
GPO0
4
DIO_PH_IN0
GPI0
5
DIO_PH_OUT1
GPO1
6
DIO_PH_IN1
GPI1
7
DIO_PH_OUT2
GPO2
8
DIO_PH_IN2
GPI2
9
DIO_PH_OUT3
GPO3
10
DIO_PH_IN3
GPI3
Notes
1. Output pin default setting is HIGH
GPIO function is provided by Fintek F81866A IC, which can be accessed
through its GPIO index/data port. The index port is the base address +0 and
the data port is the base address +1. To access the GPIO register, write index
to the index port, and then read/write from/to data port. The configuration on
CT-MHW0X is described as below.
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